Presently, there are various types of lapping machines for reducing the thickness of semiconductor wafers. In general, these lapping machines include top and bottom lapping plates, between which the wafers are positioned. The two lapping plates are then moved relative to each other, and a slurry, consisting of an abrasive solution with or without an etching reagent, is fed between the plates to grind and flush away the wafer particles. An example of such a lapping machine is disclosed in U.S. Pat. No. 3,063,206.
U.S. Pat. Nos. 4,197,676 and 4,199,902 each disclose a lapping machine for automatically controlling the lapping of piezoelectric wafers. The top plate of the lapping machine includes an electrode having a solid dielectric disk, an upper conducting surface and a conducting rod or wire connected to the conducting surface. The lapping machine further includes a voltage-controlled oscillator whose output is connected to a resistor which is in series with the electrode, an automatic control circuit, a sweep voltage terminal, a solid state relay connected in series with a lapping machine motor, and a power line outlet connected to the control circuit. The automatic feature of the lapping machine serves to terminate the lapping process when the frequency of one or more of the piezoelectric wafers reaches a defined relationship with a target frequency. U.S. Pat. No. 4,199,902 includes an embodiment wherein a second electrode is embedded in the top plate.
U.S. Pat. No. 4,407,094 also discloses a lapping machine for automatically controlling the lapping of a semiconductor wafer. The machine includes a pin diode having two terminals. One of the terminals is connected to an electrode which is inserted into a lapping plate, and the other terminal is connected to a sweep frequency generator. Each of the two terminals is also connected to an impedance comparator which senses the presence or absence of a piezoelectric wafer under the electrode, and which actuates a switch connected to an automatic control circuit. The control circuit serves to sense wafer frequencies, and to control a relay which switches between a lapping motor and a power supply. In operation, the lapping machine monitors the resonance frequency of a wafer, compares the resonance frequency with a predetermined target frequency, and activates a relay when the wafer frequency equals or exceeds the target frequency.
IBM Technical Disclosure Bulletin, Vol. 19, No. 4, Sept. 1976, by J. R. Skobern, discloses an electrical removal technique for removing metal nodules which penetrate an insulative layer of an electronic system. The technique includes placing a conductive "commoning ring" over the metal layer, and connecting the ring to the ground terminal of a power supply. The technique further includes placing a metal plate in contact with the metal nodules, and connecting the plate to the positive terminal of the power supply. When the power supply is activated, the metal nodules are subjected to high current density, thereby causing the nodules to vaporize.
In addition to lapping machines, various other devices and methods exist for determining etch endpoints of semiconductor wafers. The following are examples of such devices and methods.
U.S. Pat. No. 3,874,959 discloses an apparatus for detecting the etch endpoint of an oxide coated semiconductor substrate. The apparatus includes a first electrical lead wire connected to the substrate, and a second electrical wire connected to an electrode disposed in a bath of etching solution. The lead wires are connected to a detector or readout meter. A d.c. light source is focused on the substrate to provide a spot of light at the etching point. As the oxide coating of the semiconductor substrate is etched away, a signal is detected when the etching solution makes electrical contact with the material of the semiconductor substrate.
U.S. Pat. No. 4,207,137 discloses a plasma endpoint etching process which includes placing a semiconductor body between two electrodes, and supplying power to the electrodes so that a plasma is created for etching the semiconductor body. The plasma etch endpoint is determined by monitoring the impedance of the plasma during the etching process.
U.S. Pat. No. 4,602,981 discloses a method of determining the endpoint of a plasma etching process by measuring the RF voltage at an electrode. The method includes placing upper and lower electrodes on opposite surfaces of a wafer, connecting the upper electrode to ground, and connecting the lower electrode to an RF source through a matching impedance to measure the RF voltage.
U.S. Pat. Nos. 4,340,456 and 4,358,338 are cited as examples of etch endpoint detection techniques for plasma etching.
In VLSI wiring technology, connecting metal lines are formed over a substrate containing device circuitry. These metal lines serve to electrically interconnect the discrete devices. These metal connecting lines are insulated from the next interconnection level by thin films of insulating material formed by, for example, chemical vapor deposition (CVD) of oxide. In order to interconnect metal lines of different interconnection levels, holes are formed in the insulating layers to provide electrical access therebetween.
In such wiring processes, it is desirable that the insulating layers have a smooth surface topography, because rough surfaces cause fabrication problems. More specifically, it is difficult to image and pattern layers applied to rough surfaces, and this difficulty increases as the number of layers increases.
A recent development in the art is the use of lapping machines and other chemical/mechanical planarization processes to provide smooth insulator topologies for the next metal level. In these processes, it is important to remove a sufficient amount of material to provide a smooth surface, without removing an excessive amount of underlaying materials. Thus, a precise etch endpoint detection technique is needed.
Traditionally, lasers and other optical detection devices have been employed to determine etch endpoint. However, the design of such optical devices is difficult to implement in lapping machines, because the wafers are polished face down against a spinning wheel in such machines. More particularly, the wafer is hidden under a wafer holder and template, thereby making optical endpoint detection difficult.
The usual method employed for determining endpoint in lapping machines is to measure the amount of time needed to planarize the first wafer, and then to run the remaining wafers at similar times. In practice, because it is extremely difficult to precisely control the rate of film removal for different wafers, this method is extremely time consuming since operators must inspect each wafer after polish.
Thus, there remains a continuing need in the semiconductor fabrication art for an apparatus and method which accurately and efficiently detects the endpoint of a lapping planarization process.